THE COMPONENT SIGNAL

Issue #003 · Monday, January 20, 2026 · Component Watch + Design Tip

MCUs — crisis-era lead times are back. STMicroelectronics automotive MCUs: up to 55 weeks. Renesas: 20–45 weeks. NXP: 12–20 weeks. These aren't outliers — they're the new baseline. TI and Infineon price hikes (effective April 1) are already in distributor systems. TI's range: 15–85% depending on the part. If you're designing in a new MCU this quarter, check allocation before you check the datasheet.

SiC MOSFETs — EV demand outpacing supply. ON Semiconductor's SiC portfolio is critically tight. EV Tier 1s are locking multi-year supply agreements, squeezing out industrial and solar customers. Upstream SiC wafer utilization dropped to ~50% in 2025 (PCIM data), but device-level lines run at 70% — the bottleneck moved from wafers to packaging. Don't assume the SiC "oversupply" narrative from last year still holds. It doesn't.

DRAM — brace for Q2. TrendForce projects DRAM contract prices up 58–63% in Q2, on top of Q1's 95% surge. NAND Flash: up to 75%. HBM remains sold out through year-end with no spot availability. Cloud providers are signing multi-quarter commitments to guarantee supply. If your product uses more than 8GB of DRAM, your BOM cost just changed materially.

When a high-speed signal trace crosses a split in the ground plane — even a 0.5 mm gap for a power domain boundary — the return current has no path directly beneath the trace. It detours around the split, creating a loop antenna.

At 500 MHz, a 10 mm detour creates a loop that radiates 15–20 dB more than a continuous return path. This is the single most common root cause of failed radiated emissions tests above 300 MHz.

Fix it: Either route signals so they never cross plane splits, or stitch a decoupling cap (100 nF) across the split directly under the crossing trace. One cap, one via pair, placed within 1 mm of the crossing point. Your EMC engineer will thank you. Your shielding requirements might drop a tier.